1. Field of the Invention
The present invention relates to a picture processing apparatus for decoding encoded picture data, a semiconductor integrated circuit, and a method for controlling a picture memory.
2. Description of the Related Art
A synchronous dynamic random access memory (SDRAM) has a plurality of banks, which are storage regions. Each bank is arranged in a two-dimensional constitution of rows and columns. A data buffer for retaining data corresponding to a row address is provided for each bank. Each storage region corresponding to each row address is called a “page”. It is possible to execute high speed access of the data buffer. On the other hand, when pages within the same bank are switched, overhead cycles (cycles other than accessing data) increase. Thus, a technique for reducing the access time according to heavy use of bank switching due to page switching has been proposed.
Concerning video compression encoding technology, during encoding, the difference between the frames is calculated in units of picture blocks for the purpose of reducing the amount of information in the time direction, and the calculated difference is encoded. The picture blocks are obtained by dividing the original picture. During decoding, the difference is decoded, and a part of a picture region that has previously been decoded is added to the decoded difference as a reference picture to attain the original picture. Thus, a picture memory able to store a previously decoded picture is provided in a picture processing apparatus for executing decoding of encoded data. The SDRAM is generally used as the picture memory.
However, in the abovementioned technique of switching banks in correspondence to the address change, it is impossible to realize high speed memory access due to no optimization of the reference picture. For this reason, a memory access technique optimizing the reference picture in the decoding of picture data is desired.